We are continuously looking for new employees, who would like to contribute to strengthening and developing our business.
We value new thinking, creativity and a confident approach to the set goals.
We offer exciting jobs and career opportunities in a company with a flat organizational structure and an open, friendly and informal work environment.
In case none of the jobs posted below matches your profile, you are most welcome to send us an unsolicited application and resumé (CV) with an indication of your area of interest.
HR office : hr@siliconhub.com
Senior Digital Design Engineer
Manager Assistant
Location: Singapore
Description:
Assist in the smooth running of the branch
Responsible for bank reconciliations and posting of the Company’s sales
Updating the weekly company cash flow
Processing staff expenses and customer refunds in accordance with company policy
Posting month end journals
Ad-hoc tasks as required
Skills and Experience:
High level of attention to detail, accuracy and timeliness
Motivated and able to manage and prioritise a busy workload
Ability to work in a challenging environment
Team player
Excellent IT skills in particular Excel,Powerpoint and etc.
Senior P & R engineer
Description:
1. Responsible for the development and support of customer based design form netlist to GDS tape out;
2. Responsible for VLSI chip floor plan;
3. Responsible for CTS, Power plan, Placement & Routing, SPF extraction;
4. Responsible for whole chip DRC/LVS, and GDS tape out.
Skills and Experience:
1. 3+ years of experience and minimum of BS in EE or equivalent; MS is a plus. Experienced in one of the major P&R (Place & Route) tool suites (Cadence, Synopsys, Mentor, or Magma);
2. Background in timing closure and signoff (PrimeTime experience);
3. Scripting expertise (Perl, Tcl, or Python) a strong plus;
4. Actual chip tapeout experience on a recent technology node (65nm or below) a strong plus.
Senior Digital Design Engineer
Job Descriptions:
1. Provide digital design support to complete mixed signal IP.
2. Perform mixed-signal co-simulations to ensure accurate block level functionality with integrated analog circuits.
3. Logic Synthesis, Static Timing Analysis and Logic Equivalency Checking
4. Design for test, scan insertion, ATPG, Functional Test Vectors
5. Interface with Place and Route Engineering to perform timing check and back-annotated simulations.
6. Ensure database integrity before any release.
7. Execute any project assignment in the timing manner.
8. Follow company’s quality standards during any project execution.
Skills and Experience:
1. At least 3 or more years of RTL level digital design experience with MS in EE or related (more senior levels will also be considered)
2. Willing to work as an active team player with group’s goal in mind.
3. Experience in writing simple digital models or real number models for analog IPs
4. Knowledge with process and device physics is a plus
5. Acceptable communication skill in written and spoken English
IP Management
Description:
1. Understanding customer’s system level design and IP requirements, and survey IP vendors for the best suitable IP solution;
2. Support customer IP related inquiry, and contact both domestic and foreign IP vendors for support;
3. Managing internal IP project, support internal project IP and debugging need.
Skills and Experience:
1. EE Bachelor degree, Master degree preferred;
2. 5 or more years experience;
3. Strong English/Chinese verbal/writing communication skill;
4. Strong system level knowledge in both digital and analog design;
5. Strong semiconductor process related knowledge.